5-level paging
Direct Cache Access
Fast Short REP MOVSB optimization
Linear Address Masking
Memory Type Range Registers
Intel XD (No eXecute bit)
Physical Address Extension
1GiB pages in 4-level paging and higher
Page Attribute Table
Page Global Bit
Protection Key Units
Page Size Extension
36-bit PSE
Supervisor Mode Access Protection
Supervisor Mode Execution Protection
Memory features.