(Hyper-V) APIC access MSRs (EOI, ICR, TPR)
(Hyper-V) Basic Synthetic Interrupt Controller MSRs
(Hyper-V) Debug MSRs
(Hyper-V) Virtual guest idle state MSR
(Hyper-V) Hypercalls API MSRs
(Hyper-V) Partition reference timestamp counter MSR
(Hyper-V) Partition reference counter MSR
(Hyper-V) Statistic pages MSRs
(Hyper-V) Synthetic Timer MSRs
(Hyper-V) Timer frequency MSRs (TSC and APIC)
(Hyper-V) Virtual system reset MSR
(Hyper-V) vCPU index MSR
(Hyper-V) Virtual processor runtime MSR
(Hyper-V) Paravirtualization Guest Build number
(Hyper-V) Paravirtualization Guest OS Major version
(Hyper-V) Paravirtualization Guest OS Minor version
(Hyper-V) Paravirtualization Guest additions open-source
(Hyper-V) Paravirtualization Guest OS ID
(Hyper-V) Paravirtualization Guest Service ID
(Hyper-V) Paravirtualization Guest Vendor ID
(Hyper-V) Guest should deprecate Auto EOI (End Of Interrupt) features
(Hyper-V) Guest should use the direct memory access (DMA) remapping
(Hyper-V) Guest should use the newer ExProcessMasks interface over ProcessMasks
(Hyper-V) Guest should use the Hypercall API for address space switches rather than MOV CR3
(Hyper-V) Guest should use the Hypercall API for local TLB flushes rather than INVLPG/MOV CR3
(Hyper-V) Guest should use the Hypercall API for inter-CPU TLB flushes rather than inter-processor-interrupts (IPI)
(Hyper-V) Guest should use the INT instruction for Mode Based Execution Control (MBEC) system calls
(Hyper-V) Guest should use the interrupt remapping
(Hyper-V) Guest should use the MSRs for APIC access (EOI, ICR, TPR) rather than memory-mapped input/output (MMIO)
(Hyper-V) Guest should use the hypervisor-provided MSR for a system reset instead of traditional methods
(Hyper-V) Guest should use enlightened Virtual Machine Control Structure (VMCS) interfaces and nested enlightenment
(Hyper-V) Hyper-V instance is nested within a Hyper-V partition
(Hyper-V) Guest should relax timer-related checks (watchdogs/deadman timeouts) that rely on timely deliver of external interrupts
(Hyper-V) Guest should use the SyntheticClusterIpi Hypercall
(Hyper-V) Guest should use the X2APIC MSRs rather than memory mapped input/output (MMIO)
(Hyper-V) Hypervisor is using the Advanced Virtual Interrupt Controller (AVIC) overlay
(Hyper-V) Hypervisor is using direct memory access (DMA) protection
(Hyper-V) Hypervisor is using direct memory access (DMA) remapping
(Hyper-V) Hypervisor requires a High Precision Event Timer (HPET)
(Hyper-V) Hypervisor is using interrupt remapping
(Hyper-V) Hypervisor's memory patrol scrubber is present
(Hyper-V) Hypervisor is using MSR bitmaps
(Hyper-V) Hypervisor is using nested paging
(Hyper-V) Hypervisor supports the architectural performance counter
(Hyper-V) Hypervisor's synthetic timers are volatile
(Hyper-V) Debug MSR available
(Hyper-V) Hypervisor can be disabled
(Hyper-V) Extended guest virtual address (GVA) ranges for FlushVirtualAddressList available
(Hyper-V) Guest crash MSR available
(Hyper-V) Guest supports debugging
(Hyper-V) Virtual guest supports idle state
(Hyper-V) Hypercall MISR lock feature available
(Hyper-V) Returning hypercall output via XMM registers available
(Hyper-V) Hypervisor supports sleep
(Hyper-V) Support for injecting synthetic machine checks
(Hyper-V) MWAIT instruction available for guest
(Hyper-V) Documentation unavailable
(Hyper-V) Physicap CPU dynamic partitioning event available
(Hyper-V) Performance monitor support available
(Hyper-V) NUMA distance query available
(Hyper-V) Synthetic interrupt source polling mode available
(Hyper-V) Determining timer frequencies available
(Hyper-V) Possible to directly use synthetic MSRs
(Hyper-V) Hypercalls via XMM registers available
(Hyper-V) Memory pool can be accessed
(Hyper-V) Partitions IDs can be accessed
(Hyper-V) Can access statistics
(Hyper-V) Virtual private registers available
(Hyper-V) Virtual system monitor available
(Hyper-V) Possible to adjust message buffers
(Hyper-V) Possible to connect to ports
(Hyper-V) Processor management available
(Hyper-V) Processor profiler available
(Hyper-V) Partitions can be created
(Hyper-V) Possible to create ports
(Hyper-V) Debugging features available
(Hyper-V) Extended stack walking available
(Hyper-V) Extended hypercalls API available
(Hyper-V) Possible to send messages
(Hyper-V) Possible to signal events
(Hyper-V) Virtual processor has started
(Hyper-V) High-precision event timer required for C3 state
(Hyper-V) Processor C0 is maximum state
(Hyper-V) Processor C1 is maximum state
(Hyper-V) Processor C2 is maximum state
(Hyper-V) Processor C3 is maximum state