CPUINFO

CPU information structure

@system extern (C)

struct CPUINFO {

uint maxLeaf;

uint maxLeafVirt;

uint maxLeafExtended;

VendorString vendor;

union __anonymous;

ubyte brandIndex;

uint cacheLevels;

CACHEINFO[CACHE_LEVELS] cache;

ushort logicalCores;

ushort physicalCores;

uint identifier;

ushort family;

ushort model;

ubyte familyBase;

ubyte familyExtended;

ubyte modelBase;

ubyte modelExtended;

ubyte stepping;

const(char)* typeString;

bool mmxExtended;

bool _3DNowExtended;

bool waitpkg;

bool avx512f;

bool avx512er;

bool avx512pf;

bool avx512cd;

bool avx512dq;

bool avx512bw;

bool avx512vl;

bool avx512_ifma;

bool avx512_vbmi;

bool avx512_vbmi2;

bool avx512_gfni;

bool avx512_vaes;

bool avx512_vnni;

bool avx512_bitalg;

bool avx512_vpopcntdq;

bool avx512_4vnniw;

bool avx512_4fmaps;

bool avx512_bf16;

bool avx512_vp2intersect;

bool amx_bf16;

bool amx_int8;

bool amx_xtilecfg;

bool amx_xtiledata;

bool amx_xfd;

ubyte sgxMaxSize;

ubyte sgxMaxSize64;

bool pclmulqdq;

bool monitor;

ushort mwaitMin;

ushort mwaitMax;

bool cmpxchg8b;

bool cmpxchg16b;

bool sysenter;

bool rdtscDeadline;

bool rdtscInvariant;

bool osxsave;

bool pconfig;

bool cldemote;

bool movdiri;

bool movdir64b;

bool syscall;

bool monitorx;

bool serialize;

bool turboboost;

bool turboboost30;

bool clflush;

ubyte clflushLinesize;

bool clflushopt;

bool prefetchw;

bool invpcid;

bool wbnoinvd;

ubyte apicMaxId;

ubyte apicId;

bool virtualization;

ubyte virtVersion;

VirtVendorString virtVendor;

bool page1gb;

union __anonymous;

bool fsrepmov;

ubyte physicalBits;

ubyte linearBits;

bool ia32_arch_capabilities;

bool ibrsAlwaysOn;

bool ibrsPreferred;

bool stibpAlwaysOn;

bool l1dFlush;

bool md_clear;

bool fsgsbase;

}

Members

Structs

HyperV struct HyperV: Undocumented in source.
KVM struct KVM: Undocumented in source.
VBox struct VBox: Undocumented in source.

Unions

__anonymous union __anonymous: Undocumented in source.
__anonymous union __anonymous: Undocumented in source.

Variables

_3DNow bool _3DNow;: 3DNow!
_3DNowExtended bool _3DNowExtended;: 3DNow! Extended
_5pl bool _5pl;: 5-level paging
adx bool adx;: Multi-precision Add-Carry (ADCX+ADOX)
aes_ni bool aes_ni;: Advanced Encryption Standard New Instructions
amx bool amx;: Advanced Matrix eXtension
amx_bf16 bool amx_bf16;: AMX_BF16
amx_int8 bool amx_int8;: AMX_INT8
amx_xfd bool amx_xfd;: AMX_XFD
amx_xtilecfg bool amx_xtilecfg;: AMX_XTILECFG
amx_xtiledata bool amx_xtiledata;: AMX_XTILEDATA
apci bool apci;: ACPI information. +//// ACP
apic bool apic;: APIC
apicId ubyte apicId;: Initial APIC ID (running core where CPUID was called)
apicMaxId ubyte apicMaxId;: Maximum APIC ID
apicv bool apicv;: (AMD) APICv. Intel's is available via a MSR.
arat bool arat;: Always-Running-APIC-Timer
avx bool avx;: Advanced Vector eXtension
avx2 bool avx2;: AVX2
avx512_4fmaps bool avx512_4fmaps;: AVX512_4FMAPS
avx512_4vnniw bool avx512_4vnniw;: AVX512_4VNNIW
avx512_bf16 bool avx512_bf16;: AVX512_BF16
avx512_bitalg bool avx512_bitalg;: AVX512_BITALG
avx512_gfni bool avx512_gfni;: AVX512_GFNI
avx512_ifma bool avx512_ifma;: AVX512_IFMA
avx512_vaes bool avx512_vaes;: AVX512_VAES
avx512_vbmi bool avx512_vbmi;: AVX512_VBMI
avx512_vbmi2 bool avx512_vbmi2;: AVX512_VBMI2
avx512_vnni bool avx512_vnni;: AVX512_VNNI
avx512_vp2intersect bool avx512_vp2intersect;: AVX512_VP2INTERSECT
avx512_vpopcntdq bool avx512_vpopcntdq;: AVX512_VPOPCNTDQ
avx512bw bool avx512bw;: AVX512_BW
avx512cd bool avx512cd;: AVX512_CD
avx512dq bool avx512dq;: AVX512_DQ
avx512er bool avx512er;: AVX512_ER
avx512f bool avx512f;: AVX512
avx512pf bool avx512pf;: AVX512_PF
avx512vl bool avx512vl;: AVX512_VL
bmi1 bool bmi1;: BMI1
bmi2 bool bmi2;: BMI2
brandIndex ubyte brandIndex;: Brand string index
cache CACHEINFO[CACHE_LEVELS] cache;: Undocumented in source.
cacheLevels uint cacheLevels;: Undocumented in source.
cetIbt bool cetIbt;: (Control-flow Enforcement Technology) Indirect Branch Tracking
cetSs bool cetSs;: (Control-flow Enforcement Technology) Shadow Stack
cldemote bool cldemote;: CLDEMOTE instruction
clflush bool clflush;: Cache-related. +//// CLFLUSH instructio
clflushLinesize ubyte clflushLinesize;: Linesize of CLFLUSH in bytes
clflushopt bool clflushopt;: CLFLUSH instruction
cmov bool cmov;: CMOVcc instruction
cmpxchg16b bool cmpxchg16b;: CMPXCHG16B instruction
cmpxchg8b bool cmpxchg8b;: CMPXCHG8B
cnxtId bool cnxtId;: L1 Context ID
dca bool dca;: Direct Cache Access
de bool de;: Degging Extensions
ds bool ds;: Debug Store
ds_cpl bool ds_cpl;: Debug Store for Current Privilege Level
dtes64 bool dtes64;: 64-bit Debug Store area
eist bool eist;: Intel SpeedStep/AMD PowerNow/AMD Cool'n'Quiet
enqcmd bool enqcmd;: ENQCMD instruction
f16c bool f16c;: Float16 Conversions
family ushort family;: Effective family identifier
familyBase ubyte familyBase;: Base family identifier
familyExtended ubyte familyExtended;: Extended family identifier
fma bool fma;: Fused Multiply-Add (FMA)
fma4 bool fma4;: FMA4
fpu bool fpu;: On-Chip x87 FPU
fsgsbase bool fsgsbase;: FS and GS register base
fsrepmov bool fsrepmov;: Fast Short REP MOVSB optimization
fxsr bool fxsr;: FXSAVE and FXRSTOR instructions
htt bool htt;: (HTT) HyperThreading Technology, or just SMT available
hv HyperV hv;: Undocumented in source.
ia32_arch_capabilities bool ia32_arch_capabilities;: Security features and mitigations. +//// IA32_ARCH_CAPABILITIES MS
ibpb bool ibpb;: Indirect Branch Predictor Barrier
ibrs bool ibrs;: Indirect Branch Restricted Speculation
ibrsAlwaysOn bool ibrsAlwaysOn;: IBRS always enabled
ibrsPreferred bool ibrsPreferred;: IBRS preferred over software solution
identifier uint identifier;: Raw identifier (CPUID.01h.EAX)
invpcid bool invpcid;: INVPCID instruction
kvm KVM kvm;: Undocumented in source.
l1dFlush bool l1dFlush;: L1D Cache Flush
lahf64 bool lahf64;: LAHF+SAHF in 64-bit mode
lam bool lam;: Linear Address Masking
linearBits ubyte linearBits;: Memory linear bits
logicalCores ushort logicalCores;: Logical cores in this processor
lzcnt bool lzcnt;: LZCNT instruction
maxLeaf uint maxLeaf;: Highest cpuid leaf
maxLeafExtended uint maxLeafExtended;: Highest cpuid extended leaf
maxLeafVirt uint maxLeafVirt;: Highest cpuid virtualization leaf
mca bool mca;: Machine Check Architecture
mce bool mce;: Machine Check Exception
md_clear bool md_clear;: MDS mitigation
mmx bool mmx;: MMX
mmxExtended bool mmxExtended;: MMX Extended
model ushort model;: Effective model identifier
modelBase ubyte modelBase;: Base model identifier
modelExtended ubyte modelExtended;: Extended model identifier
monitor bool monitor;: MONITOR and MWAIT instructions
monitorx bool monitorx;: MONITORX and MWAITX instructions
movbe bool movbe;: MOVBE instruction
movdir64b bool movdir64b;: MOVDIR64B instruction
movdiri bool movdiri;: MOVDIRI instruction
mtrr bool mtrr;: Memory Type Range Registers
mwaitMax ushort mwaitMax;: (With MONITOR+MWAIT) MWAIT maximum size in bytes
mwaitMin ushort mwaitMin;: (With MONITOR+MWAIT) MWAIT minimum size in bytes
nx bool nx;: Intel XD (No eXecute bit)
osxsave bool osxsave;: OSXSAVE and XGETBV instructions
pae bool pae;: Physical Address Extension
page1gb bool page1gb;: 1GiB pages in 4-level paging and higher
pat bool pat;: Page Attribute Table
pbe bool pbe;: Pending Break Enable
pcid bool pcid;: PCID
pclmulqdq bool pclmulqdq;: PCLMULQDQ instruction
pconfig bool pconfig;: PCONFIG instruction
pdcm bool pdcm;: Perfmon And Debug Capability
pge bool pge;: Page Global Bit
physicalBits ubyte physicalBits;: Memory physical bits
physicalCores ushort physicalCores;: Physical cores in this processor
pku bool pku;: Protection Key Units
popcnt bool popcnt;: POPCNT instruction
prefetchw bool prefetchw;: PREFETCHW instruction
pse bool pse;: Page Size Extension
pse36 bool pse36;: 36-bit PSE
psn bool psn;: Miscellaneous features. +//// Processor Serial Number (Pentium III only
rdmsr bool rdmsr;: RDMSR instruction
rdpid bool rdpid;: RDPID instruction
rdrand bool rdrand;: RDRAND instruction
rdseed bool rdseed;: RDSEED instruction
rdtsc bool rdtsc;: RDTSC instruction
rdtscDeadline bool rdtscDeadline;: (With RDTSC) IA32_TSC_DEADLINE MSR
rdtscInvariant bool rdtscInvariant;: (With RDTSC) Timestamp counter invariant of C/P/T-state
rdtscp bool rdtscp;: RDTSCP instruction
sdbg bool sdbg;: Silicon Debug
serialize bool serialize;: SERIALIZE instruction
sgx bool sgx;: If SGX is supported (and enabled)
sgx1 bool sgx1;: SGX1
sgx2 bool sgx2;: SGX2
sgxMaxSize ubyte sgxMaxSize;: 2^n maximum enclave size in non-64-bit
sgxMaxSize64 ubyte sgxMaxSize64;: 2^n maximum enclave size in 64-bit
sha bool sha;: SHA-1
skinit bool skinit;: SKINIT instruction
smap bool smap;: Supervisor Mode Access Protection
smep bool smep;: Supervisor Mode Execution Protection
smx bool smx;: Intel TXT
ss bool ss;: SelfSnoop
ssbd bool ssbd;: Speculative Store Bypass Disable
sse bool sse;: Streaming SIMD Extensions
sse2 bool sse2;: SSE2
sse3 bool sse3;: SSE3
sse41 bool sse41;: SSE4.1
sse42 bool sse42;: SSE4.2
sse4a bool sse4a;: SSE4a
ssse3 bool ssse3;: SSSE3
stepping ubyte stepping;: Stepping revision
stibp bool stibp;: Single Thread Indirect Branch Predictors
stibpAlwaysOn bool stibpAlwaysOn;: STIBP always enabled
syscall bool syscall;: SYSCALL and SYSRET instructions
sysenter bool sysenter;: SYSENTER and SYSEXIT instructions
tbm bool tbm;: Trailing Bit Manipulation
tm bool tm;: Thermal Monitor
tm2 bool tm2;: Thermal Monitor 2
turboboost bool turboboost;: Intel TurboBoost/AMD CorePerformanceBoost
turboboost30 bool turboboost30;: Intel TurboBoost 3.0
type ubyte type;: Processor type number
typeString const(char)* typeString;: Processor type string.
uintr bool uintr;: User Interrupts
vbox VBox vbox;: Undocumented in source.
vendor VendorString vendor;: Vendor string and id
virtVendor VirtVendorString virtVendor;: Undocumented in source.
virtVersion ubyte virtVersion;: (AMD) Virtualization platform version
virtualization bool virtualization;: Intel VT-x/AMD-V
vme bool vme;: Enhanced vm8086
waitpkg bool waitpkg;: User Level Monitor Wait (UMWAIT)
wbnoinvd bool wbnoinvd;: WBNOINVD instruction
x2apic bool x2apic;: x2APIC
x86_64 bool x86_64;: 64-bit mode (Long mode)
xop bool xop;: AMD eXtended OPerations
xsave bool xsave;: XSAVE and XRSTOR instructions
xtpr bool xtpr;: xTPR

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